module ALU (a,b,sel,out,iclk);
 input [7:0] a,b;
 input [2:0] sel;
 input iclk;
 output reg [7:0] out;
 
 always @*
 
 case(sel)
 3'b000: out = a&b;
 3'b001: out = a|b;
 3'b010: out = a+b;
 3'b110: out = a-b;
 3'b111: out = min(a,b);
 endcase
 
 function [7:0]min;
 input [7:0] a,b;
 if (a>b)
 min = b;
 else
 min = a;
 endfunction
 endmodule 
 
 
